Sem 1

"DESIGN AND EVALUATE THE PERFORMANCE OF VARIETY LOW NOISE AMPLIFIER (LNA) IN FOLDED CASCODE TECHNIQUES."

 FYP Supervisor : Mdm. Nor Amalia Bt. Sapiee @ Hamdan

From : Madelin Simon

Date : November 8, 2011

Subject : Progress Report (from July 25-November 7, 2011)

Introduction

The purpose of this project is to design, simulate, assemble and test the low noise amplifier (LNA) folded cascode techniques to study the LNA behavior by doing research about the FC performance in gain, noise and input output matching. This progress report discusses the progress I have made from July 25 to November 7.

Work Completed from July 25 to November 7 2011

During this period, I finished the first half of the project regarding literature review, information findings and circuit. I am now known 2 types of transistor that mostly used in LNA folded cascode circuit. The circuit must consist of 2 input drivers that split in half to produce 2 sub-transistors in order to form the current mirror. For almost 10 weeks, I have read few projects on internet associated with LNA folded cascode. Every finding has contributed well to my project proposal presentation and to my future planning. I have done with simulation of the circuit but still need to improve it. The circuit I chose is conventional folded cascode (CFC) and recycling folded cascode (RFC). Both of them used transistor as main component as driving transistor.

Work to be completed by May 2011

First step in my next stage is to re-simulate the circuit by Multisim, assemble the folded cascode circuit and test the LNA performance through bread board. Next, I need to purchase electronics components, and construct LNA circuit onto PCB. This will be completed by end of April 2011. I would also need to test the circuit and prepare my final project slide presentation and report. The entire project should be completed by the first week of May 2011.

Problems Encountered

The crucial part of the project is the types of folded cascode circuit. There will be a lot of problem predicted regarding the performance of design throughout this project. The different gap of result between assembled hardware and simulation must be reduced in order to improve the reliability of LNA on PCB and breadboard in order to reach the succession of the project. Experimental research will be conducted by testing the circuit myself or with the help of course mates and group mates.